Biodata |
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| Name of the Candidate | : | [Private] |
| Name of the Post Applied | : | Embedded Software Developer |
| Job related skills / software | : | C, System Programming, Linux Kernel, Kernel Configuration, Microcontrollers |
| Category | : | IT / Computer2 |
| Sub Category | : | Software Developer / Engineer |
| Years of Experience | : | 0 years |
| State | : | Tamil Nadu |
| Gender | : | Female |
| Salary Expected per Month(Rs) | : | 30,000 to 40,000 |
| Highest Qualification attained | : | M.Tech. : Master of Technology |
| Major / Specialization | : | VLSI Design and Embedded Systems |
| Email Id | : | [Private] |
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| Are you looking for job now? | : | Yes |
| Can the recruiter contact you? | : | Yes |
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Gudala Konica
Email : konicagudala22 AT gmail.com
Objective :
To pursue a challenging career in a reputed organization that give me scope to acquire new skills and awareness with the new technologies & work hard to achieve organization goals.
Qualification :
** M.Techin VLSI design and Embedded systems with 8.43 CGPA in Gayatri Vidya Parishad college of Engineering (A), Visakhapatnam affiliated to JNTUK, in 2016-18.
** B.Techin Electronics and Communication Engineering with 76% in SPCT, Rajahmundry affiliated to JNTUK, in 2012-16.
Technical skills :
** Advanced C programming on linux platform- Memory segments, GDB tool, compilation stages of a program.
** System programming- fork system call, Process management, File management, Basic IO calls.
** Socket programming- TCP/IP protocol, Flow of Server and client communication.
** Basic programming on microcontrollers like 8051 & LPC2148.
Tools :
Keil, Proteus, GDB tool, Synopsys HSPICE.
Certification :
An NPTEL online certification course on “Embedded system design with ARM” held by IIT Kharagpur in Jan-march 2019.
Area of Interest :
Device driver programming, ARM, PCB Design.
Achievements :
** Got 1st prize in Academics in B.Tech 1st year with 83% in SPCT, Rajahmundry.
** Won 3rd prize in Singing competition conducted by Vijaya Sankara Govt.
School of Music & Dance, Rajahmundry.
Project Profile :
M.Tech :“Design and analysis of CMOS and CNTFET based Ternary Operators for Scrambling”
** This project is about the transistor-level implementation of operators namely SUM, Scrambling operator1 and Scrambling operator2 which are designed with CMOS and CNTFET in 32 nm technology node in ternary logic.
** A comparative analysis between the CMOS and CNTFET technology is performed in terms of performance parameters like power, delay, power-delay product. The operators designed with 32 nm CNTFET technology has lower energy consumption and can be used in scrambling applications in cryptography.
** These ternary operators (ternary logic) can be used for encryption and decryption of data.
Tool used : Synopsys HSPICE.
Paper Publication :
One of my papers got published in a UGC approved journal (Journal of Nanoscience and technology) based on my M.Tech thesis titled “Design and analysis of CMOS and CNTFET based Ternary Operators for Scrambling” in January 2019.
Strengths :
** Strongly self-motivated.
** To encourage others and being friendly in nature.
** Dedicated to work hard until my task gets completed.
Declaration :
Hereby, I declare that the above information furnished by me is true to the best of my knowledge.
Date :
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