S.NIRMALRAJ
EMAILID :nirmal.siva5396 AT gmail.com
M.E (VLSI DESIGN)
Contact no :7401404854
CAREER OBJECTIVE :
To apply my life and learned skill to help realize the goal of the organization I work for and in the process build a career which is intellectually challenging and personally rewarding.
BASIC ACADEMIC CREDENTIALS :
** M.E(VLSI DESIGN) VelTech MultiTech Engineering College Avadi,Chennai. 2014-2016 8.4(CGPA)
** B.E (ECE) DMI College Of Engineering, Chennai. 2010-2014 6.12(CGPA)
** HSC St.Joseph Higher Secondary School, Cuddalore. 2010 76%
** SSLC St.Dominic Matric Hr.Sec.School, Cuddalore. 2008 80%
AREA OF INTEREST :
** ASIC Design and Verification
** Testing of VLSI Circuits
** Physical Design
PROJECT :
B.E PROJECT TITLE : Wireless Network Design for Transmission Line Monitoring in Smart Grid
ABOUT THE PROJECT : To monitor the status of the power system in various component in real time, sensors put in the power n/w .The sensors are capable of taking measurement of a various physical or electrical parameter .In these project is to monitor the line breakage and monitoring the transmission line using wireless sensor network.
M.E PROJECT TITLE : A Low Power and High Speed Pipeline Architecture using Adaptive Median Filter for Noise Reduction in Image Processing.
ABOUT THE PROJECT : Low level data processing functions, like FIR filtering, pattern recognition or correlation, where the parallel implementation is supported by architecture matched special purpose arithmetic; high throughput FPGA circuits easily outperform even the most advanced DSP processors.
Then adaptive median filter solves the dual purpose of removing the impulse noise from the image. This can achieve the filtering operation of an image corrupted with impulse noise.
SEMINARS :
** Seminar on Application-Specific Integrated Circuit.
** Seminar on Field-Programmable Gate Array Architecture.
TECHNICAL SKILL :
Software’s : Xilinx-ISE 7.1, Spice,Tanner.
Tools : CADENCE-Virtuoso 6.1.3(Analog and Digital Flow).
Programming Language : C, C++, Scripting Language, Verilog HDL.
Operating System : Windows 7, Windows 8, Linux.
STRENGTH :
** Team Work
** Ability to Work under Pressure
** Hard Work
** Quick Learner
INTERPERSONAL SKILL :
** Basic knowledge of networking and hardware.
** Good team worker and also as a good leader.
** Ability to balance and tackle any kind of situation.
PERSONAL DETAILS :
Father's Name :- Siva. S
Permanent Address :- 1/297,Kathavarayan Kovil St, Cuddalore Dt.
DOB :- 30th July, 1993
Gender :- Male
Language Known :- English, Tamil.
Marital Status :- Single
Nationality/Religion :- Indian/Hindu.
Hobbies :- Web Surfing, Reading Books.
DECLARATION :
I hereby declare that the above information are true to the best of my knowledge and own belief.
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